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EM621FV16BU series low power, 128kx16 sram 1 document title 128k x16 bit low power and low voltage full cmos static ram revision history revision no. history draft date remark 0.0 initial draft june 28, 2007 0.1 0.1 revision revised voh(2.2v to 2.4v),toh(15ns to 10ns), toe-55(30ns to 25ns), twp-55(45ns to 40ns), twp-70(55ns to 50ns), twhz-70(25ns to 20ns), icc(2ma to 3ma), icc1(2ma to 3ma) july 2, 2007 0.2 0.2 revision fix typo error nov. 13, 2007 emerging memory & logic solutions inc. 4f korea construction financial cooperative b/d, 301-1 yeon-dong, jeju-si, jeju-do, rep.of korea zip code : 690-719 tel : +82-64-740-1712 fax : +82-64-740-1749~1750 / homepage : www.emlsi.com the attached data sheets are provided by em lsi reserve the right to chan ge the specifications and produ cts. emlsi will answer t o your questions about device. if you have any questions, please cont act the emlsi office.
EM621FV16BU series low power, 128kx16 sram 2 128k x16 bit low power and lo w voltage cmos static ram row select i/o circuit column select data cont data cont pre-charge circuit memory array 1024 x 2048 a 1 a 2 a 3 a 4 a 5 a 6 a 7 a 0 a 8 a 9 a 10 a 11 a 12 a 13 a 14 a 15 a 16 we oe ub lb cs i/o0 ~ i/o7 i/o8 ~ i/o15 v cc v ss control logic features - process technology : 0.15mm full cmos - organization : 128k x16 - power supply voltage => EM621FV16BU series : 2.7v~3.6v - low data retention voltage : 1.5v (min) - three state output and ttl compatible - packaged product designed for 45/55/70ns - package type: 44-tsop2 general description the EM621FV16BU series are fabricated by emlsi?s advanced full cmos process technology. the families support industrial temperature range and chip scale pack- age for user flexibility of syst em design. the families also supports low data retention voltage for battery back-up operation with low data retention current. the EM621FV16BU series are available in kgd, jedec standard 44 pin 400 mil tsop2 package. product family product family operating temperature vcc range speed power dissipation pkg type standby (i sb1 , typ.) operating (i cc1 .max) EM621FV16BU-45lf industrial (-40 ~ 85 o c) 2.7v~3.6v 45ns 1 a 3ma 44-tsop2 EM621FV16BU-55lf industrial (-40 ~ 85 o c) 2.7v~3.6v 55ns 1 a 3ma 44-tsop2 EM621FV16BU-70lf industrial (-40 ~ 85 o c) 2.7v~3.6v 70ns 1 a 3ma 44-tsop2 name function name function cs chip select inputs vcc power supply oe output enable input vss ground we write enable input ub upper byte (i/o 8~15 ) a0~a16 address inputs lb lower byte (i/o 0~7 ) i/o0~i/o15 data inputs/outputs nc no connection functional block diagram pin description EM621FV16BU-45lf 1 2 3 4 5 6 7 8 a4 a3 9 10 11 12 13 14 15 16 a2 a1 we a15 vss a11 a16 a14 a12 a7 nc a5 32 31 30 29 28 27 26 25 23 22 21 20 19 18 17 oe cs a10 a8 a9 i/o 7 i/o 6 i/o 5 vcc i/o 3 i/o 2 i/o 1 i/o 0 i/o 4 a0 a13 24 33 34 35 36 37 38 39 40 41 42 43 44 nc i/o 8 i/o 9 i/o 10 i/o 11 vcc vss i/o 12 i/o 13 i/o 14 i/o 15 lb ub a6
EM621FV16BU series low power, 128kx16 sram 3 absolute maximum ratings * * stresses greater than those listed above ?absolute maximum ratings? may cause permanent damage to the device. functional oper- ation should be restricted to recommended operating condition. exposure to absolute maximum rating conditions for extended per iods may affect reliability. parameter symbol minimum unit voltage on any pin relative to vss v in , v out -0.2 to 4.0v v voltage on vcc supply relative to vss v cc -0.2 to 4.0v v power dissipation p d 1.0 w operating temperature t a -40 to 85 o c functional description note: x means don?t care. (must be low or high state) cs oe we lb ub i/o 0-7 i/o 8-15 mode power h x x x x high-z high-z deselected stand by x x x h h high-z high-z deselected stand by l h h l x high-z high-z output disabled active l h h x l high-z high-z output disabled active l l h l h data out high-z lower byte read active l l h h l high-z data out upper byte read active l l h l l data out data out word read active l x l l h data in high-z lower byte write active l x l h l high-z data in upper byte write active l x l l l data in data in word write active
EM621FV16BU series low power, 128kx16 sram 4 dc and operating characteristics notes 1. typical values are measured at vcc=3.3v, t a = 25 o c and not 100% tested. parameter symbol test conditions min typ max unit input leakage current i li v in =v ss to v cc -1 - 1 ua output leakage current i lo cs =v ih or oe =v ih or we =v il or lb =ub =v ih v io =v ss to v cc -1 - 1 ua operating power supply i cc i io =0ma, cs =v il , v in =v ih or v il --3ma average operating current i cc1 cycle time=1 s, 100% duty, i io =0ma, cs < 0.2v, lb < 0.2v or/and ub < 0.2v, v in < 0.2v or v in > v cc -0.2v --3 ma i cc2 cycle time = min, i io =0ma, 100% duty, cs =v il , lb =v il or/and ub =v il , v in =v il or v ih 45ns - - 35 ma 55ns - - 30 70ns - - 25 output low voltage v ol i ol = 2.1ma --0.4v output high voltage v oh i oh = -1.0ma 2.4 - - v standby current (ttl) i sb cs =v ih , other inputs=v ih or v il --0.3ma standby current (cmos) i sb1 cs > v cc -0.2v other inputs = 0~v cc (typ. condition : v cc =3.3v @ 25 o c) (max. condition : v cc =3.6v @ 85 o c) lf - 1 1) 10 ua recommended dc operating conditions 1) 1. t a = -40 to 85 o c, otherwise specified 2. overshoot: v cc +2.0 v in case of pulse width < 20ns 3. undershoot: -2.0 v in case of pulse width < 20ns 4. overshoot and undershoot are sampled, not 100% tested . parameter symbol min typ max unit supply voltage v cc 2.7 3.3 3.6 v ground v ss 000 v input high voltage v ih 2.2 - v cc + 0.2 2) v input low voltage v il -0.2 3) -0.6v capacitance 1) (f =1mhz, t a =25 o c) 1. capacitance is samp led, not 100% tested. item symbol test condition min max unit input capacitance c in v in =0v - 8 pf input/ouput capacitance c io v io =0v - 10 pf
EM621FV16BU series low power, 128kx16 sram 5 ac operating conditions test conditions ( test load and test input/output reference) input pulse level : 0.4v to 2.2v input rise and fall time : 5ns input and output reference voltage : 1.5v output load (see right) : cl 1) = 100pf + 1 ttl (70ns) cl 1) = 30pf + 1 ttl (45ns/55ns) 1. including scope and jig capacitance 2. r 1 =3070 ohm , r 2 =3150 ohm 3. v tm =2.8v 4. cl = 5pf + 1 ttl (measurement with t lz1,2 , t hz1,2 , t olz , t ohz , t whz ) cl 1) v tm 3) r 1 2) r 2 2) parameter symbol 45ns 55ns 70ns unit min max min max min max read cycle time t rc 45 - 55 - 70 - ns address access time t aa -45-55-70 ns chip select to output t co -45-55-70 ns output enable to valid output t oe -25-25-35 ns ub , lb access time t ba 45 55 70 ns chip select to low-z output t lz 10 - 10 - 10 - ns ub , lb enable to low-z output t blz 5- 5- 5 - ns output enable to low-z output t olz 5-5-5- ns chip disable to high-z output t hz 020020025 ns ub , lb disable to high-z output t bhz 015020025 ns output disable to high-z output t ohz 015020025 ns output hold from address change t oh 10 - 10 - 10 - ns parameter symbol 45ns 55ns 70ns unit min max min max min max write cycle time t wc 45 - 55 - 70 - ns chip select to end of write t cw 45 - 45 - 60 - ns address setup time t as 0-0-0- ns address valid to end of write t aw 45 - 45 - 60 - ns ub , lb valid to end of write t bw 45 - 45 - 60 - ns write pulse width t wp 35 - 40 - 50 - ns write recovery time t wr 0-0-0- ns write to ouput high-z t whz 0 15 0 20020 ns data to write time overlap t dw 25 25 30 ns data hold from write time t dh 0-0-0- ns end write to output low-z t ow 5-5-5- ns read cycle (v cc =2.7v to 3.6v, gnd = 0v, t a = -40 o c to +85 o c) write cycle (v cc =2.7v to 3.6v, gnd = 0v, t a = -40 o c to +85 o c)
EM621FV16BU series low power, 128kx16 sram 6 t rc address cs ub ,lb oe data out t co t oh t ba t oe high-z t bhz t ohz t whz timing waveform of read cycle(2) (we = v ih ) data valid t olz t blz t lz t aa t hz t rc address t aa data valid t oh previous data valid timing waveform of read cycle(1). (address controlled, cs =oe =v il , ub or/and lb =v il ) data out timing diagrams notes (read cycle) 1. t hz and t ohz are defined as the outputs achieve the open circuit condi tions and are not referenced to output voltage levels. 2. at any given temperature and voltage condition, t hz (max.) is less than t lz (min.) both for a given device and from device to device interconnection.
EM621FV16BU series low power, 128kx16 sram 7 t wr (4) t wc address cs ub ,lb we data in data out t cw (2) t aw t bw t wp (1) t as (3) high-z t dw t dh high-z t ow t whz data undefined timing waveform of write cycle(1) (we controlled) data valid t wc address cs ub ,lb we data in data out t cw (2) t wr (4) t aw t bw t wp (1) t dw t dh timing waveform of write cycle(2) (cs controlled) t as (3) high-z high-z data valid
EM621FV16BU series low power, 128kx16 sram 8 t wc address cs ub ,lb we data in data out t cw (2) t wr (4) t aw t bw t wp (1) t dw t dh timing waveform of write cycle(3) (ub , lb controlled) high-z high-z data valid t as (3) notes (write cycle) 1. a write occurs during the overlap(t wp ) of low cs and low we . a write begins when cs goes low and we goes low with asserting ub or lb for single byte operation or simultaneously asserting ub and lb for double byte operation. a write e nds at the earliest transition when cs goes high and we goes high. the t wp is measured from the beginning of write to the end of write. 2. t cw is measured from the cs going low to end of write. 3. t as is measured from the address valid to the beginning of write. 4. t wr is measured from the end or write to the address change. t wr applied in case a write ends as cs or we going high.
EM621FV16BU series low power, 128kx16 sram 9 data retention characteristics notes 1. see the i sb1 measurement condition of data sheet page 4. 2. typical value is measured at t a =25 o c and not 100% tested. parameter symbol test condition min typ 2) max unit v cc for data retention v dr i sb1 test condition (chip disabled) 1) 1.5 - 3.6 v data retention current i dr v cc =1.5v, i sb1 test condition (chip disabled) 1) -0.55.0 a chip deselect to data retention time t sdr see data retention wave form 0-- ns operation recovery time t rdr t rc -- t sdr t rdr data retention mode cs > vcc-0.2v v cc 3.0v 2.2v v dr cs gnd data retention wave form
EM621FV16BU series low power, 128kx16 sram 10 44pin - tsop type2 package dimensions unit : millimeters/inches
EM621FV16BU series low power, 128kx16 sram 11 em x xx x x x xx x x - xx xx sram part coding system 1. emlsi memory 2. product type 3. density 5. technology 6. operating voltage 8. generation 9. package 10. speed 7. organization 1. memory component em --------------------- memory 2. product type 6 ------------------------ sram 3. density 1 ------------------------- 1m 2 ------------------------- 2m 4 ------------------------- 4m 8 ------------------------- 8m 4. function 0 ----------------------- dual cs 1 ----------------------- single cs 2 ----------------------- multiplexed 3 ------------- single cs / lbb, ubb(tba=toe) 4 ------------- single cs / lbb, ubb(tba=tco) 5 ------------- dual cs / lbb, ubb(tba=toe) 6 ------------- dual cs / lbb, ubb(tba=tco) 5. technology f ------------------------- full cmos 6. operating voltage t ------------------------- 5.0v v ------------------------- 3.3v u ------------------------- 3.0v s ------------------------- 2.5v r ------------------------- 2.0v p ------------------------- 1.8v 7. organization 8 ---------------------- x8 bit 16 ---------------------- x16 bit 8. generation blank ----------------- 1st generation a ----------------------- 2nd generation b ----------------------- 3rd generation c ----------------------- 4th generation d ----------------------- 5th generation e ----------------------- 6th generation f ----------------------- 7th generation g ---------------------- 8th generation 9. package blank ---------------- kgd, 48&36fpbga s ---------------------- 32 stsop1 t ---------------------- 32 tsop1 u ---------------------- 44 tsop2 v ---------------------- 32 sop 10. speed 45 ---------------------- 45ns 55 ---------------------- 55ns 70 ---------------------- 70ns 85 ---------------------- 85ns 10 ---------------------- 100ns 12 ---------------------- 120ns 11. power ll ---------------------- low low power lf ---------------------- low low power(pb-free & green) l ---------------------- low power s ---------------------- standard power 4. function 11. power

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